Difference between revisions of "Apple Silicon"
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(2 intermediate revisions by the same user not shown) | |||
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16-Core Neural Engine | 16-Core Neural Engine | ||
|7-8 | |7-8 Cores | ||
|Dual channel LPDDR4X-4266 | |Dual channel LPDDR4X-4266 | ||
|CPU: 15W | |CPU: 15W | ||
Line 299: | Line 299: | ||
16-Core Neural Engine | 16-Core Neural Engine | ||
|14-16 | |14-16 Cores | ||
|Dual channel LPDDR5-6400 | |Dual channel LPDDR5-6400 | ||
|CPU: 30W | |CPU: 30W | ||
Line 313: | Line 313: | ||
16-Core Neural Engine | 16-Core Neural Engine | ||
|24-32 | |24-32 Cores | ||
|Quad channel LPDDR5-6400 | |Quad channel LPDDR5-6400 | ||
|CPU: 30W | |CPU: 30W | ||
Line 326: | Line 326: | ||
32-Core Neural Engine | 32-Core Neural Engine | ||
|48-64 | |48-64 Cores | ||
|8-channel LPDDR5-6400 | |8-channel LPDDR5-6400 | ||
|CPU: 60W | |CPU: 60W | ||
Line 334: | Line 334: | ||
|[[File:Apple M2.jpg|frameless|100px|link=Special:FilePath/File:Apple_M2.jpg]] | |[[File:Apple M2.jpg|frameless|100px|link=Special:FilePath/File:Apple_M2.jpg]] | ||
|M2 | |M2 | ||
|TSMC 5nm (N5P) | | rowspan="3" |TSMC 5nm (N5P) | ||
|Up to 3.5GHz 8-Core | |Up to 3.5GHz 8-Core | ||
4 performance cores (Avalanche) | 4 performance cores (Avalanche) | ||
Line 341: | Line 341: | ||
16-Core Neural Engine | 16-Core Neural Engine | ||
|8-10 | |8-10 Cores | ||
|Dual channel LPDDR5-6400 | |Dual channel LPDDR5-6400 | ||
|CPU: 15W | |CPU: 15W | ||
GPU: 15W | GPU: 15W | ||
|June 2022 | |June 2022 | ||
|- | |||
| | |||
|M2 Pro | |||
|Up to 3.5GHz 10-12 Core | |||
6-8 performance cores (Avalanche) | |||
4 efficiency cores (Blizzard) | |||
16-Core Neural Engine | |||
|16-19 Cores | |||
| rowspan="2" |Quad channel LPDDR5-6400 | |||
|CPU: 30W | |||
GPU: 30W | |||
| rowspan="2" |January 2023 | |||
|- | |||
| | |||
|M2 Max | |||
|Up to 3.7GHz 12-Core | |||
8 performance cores (Avalanche) | |||
4 efficiency cores (Blizzard) | |||
16-Core Neural Engine | |||
|30-38 Cores | |||
|CPU: 30W | |||
GPU: 55W | |||
|} | |} | ||
Line 357: | Line 383: | ||
!M1 Ultra | !M1 Ultra | ||
!M2 | !M2 | ||
!M2 Pro | |||
!M2 Max | |||
|- | |- | ||
!VP9 | !VP9 | ||
| colspan=" | | colspan="7" |Decode | ||
|- | |- | ||
!AVC (H.264) | !AVC (H.264) | ||
| colspan=" | | colspan="7" |Encode/Decode | ||
|- | |- | ||
!HEVC (H.265) | !HEVC (H.265) | ||
| colspan=" | | colspan="7" |Encode/Decode | ||
|- | |- | ||
!ProRes | !ProRes | ||
|No | |No | ||
| colspan=" | | colspan="6" |Encode/Decode | ||
|- | |- | ||
!AV1 | !AV1 | ||
| colspan=" | | colspan="7" |No | ||
|} | |} |
Latest revision as of 17:45, 31 January 2023
A Series
M Series
Mac Architectures:
Architecture | Years In Use |
---|---|
Motorola 68000 | 1983-1996 |
IBM PowerPC | 1994-2006 |
Intel x86 | 2006-2023 |
Apple ARM | 2020- |
M1 | M1 Pro | M1 Max | M1 Ultra | M2 | M2 Pro | M2 Max | |
---|---|---|---|---|---|---|---|
VP9 | Decode | ||||||
AVC (H.264) | Encode/Decode | ||||||
HEVC (H.265) | Encode/Decode | ||||||
ProRes | No | Encode/Decode | |||||
AV1 | No |